DDR SDRAM

Part No.	W9464G2IB
Datasheet	W9464G2IB.pdf
Description	The W9464G2IB is a 64M bits DDR SDRAM and speed involving -4/-5 Status: Mass Production
Features	2.5V ± 0.2V Power Supply for DDR400 2.5V ± 0.1V Power Supply for DDR500 Up to 250 MHz Clock Frequency Double Data Rate architecture; two data transfers per clock cycle Differential clock inputs (CLK and /CLK ) DQS is edge-aligned with data for Read; center-aligned with data for Write CAS Latency: 2, 2.5,3 and 4 Burst Length: 2, 4 and 8 Auto Refresh and Self Refresh Precharged Power Down and Active Power Down Write Data Mask Write Latency = 1 15.6'S Refresh interval (2K/32 mS Refresh) Maximum burst refresh cycle: 8 Interface: SSTL_2
Diagram	N/A
Package	Packaged in 144L LFBGA, using Lead free materials with RoHS compliant
Other Files	N/A
Development Tools	N/A
Others	N/A