Pseudo SRAM

Part No.	W955D6GKS
Datasheet	Contact us: PSRAM@winbond.com
Description	The W955D6GKS is a 32M bit CellularRAM™ compliant products, organized as 2M word by 16 bite; high-speed, CMOS pseudo-static random access memories developed for low-power, portable applications.
Features	16-bit address/ data bus width, Address-High, Address-Low, Data Multiplexed Supports asynchronous and burst operations VCC, VCCQ Voltages:1.7V–1.95V VCC, 1.7V–1.95V VCCQ Random access time: 70ns Burst mode READ and WRITE access: 4, 8, 16, or 32 words, or continuous burst Burst wrap or sequential Max clock rate: 133 MHz (tCLK = 7.5ns) tACLK: 5.5ns at 133 MHz, 7ns at 104 MHz Low-power features: TCR, PAR, DPD
Diagram	N/A
Package	KGD only
Other Files	N/A
Development Tools	N/A
Others	N/A