Parallel Flash memories have 22 to 44 address, data and control pins
that allow code to be executed directly from a processor. Most standard
processors and microcontrollers must boot from a parallel memory making
Parallel Flash a necessity for these systems.
System-on-a-chip ASIC controllers, however, can realize significant
benefits if designed to boot from a four-pin spiFlash memory. Upon power-up,
code is transferred from the 4-pin spiFlash serial memory to internal
or external RAM using a single read command. Code is then executed from
higher performance parallel RAM. Code segments can also be transferred
dynamically as needed after power-up. Systems that accommodate this
technique can realize significant benefits:

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Controller pins are reduced or used for other purposes
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PCBs are smaller and simpler
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Code can be compressed for greater storage
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Performance is increased using faster RAM
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Capacitive loading is decreased (for external RAM)
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Transient switching noise reduced
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Power consumption is less
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Overall system costs are lower
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