ASIC/FPGA Design Engineer
Reference	07-1231UL
Job Type	Full-time
Job Status	Sourcing
Location	San Jose
Job Description	RESPONSIBILITIES: Design and verify of next generation SoC Voice/Audio products. Responsibilities will include chip/block level functional specifications, RTL logic design, FPGA implementation, chip/block level synthesis, formal verification and test pattern generation. Also need to get involved with backend flow to achieve timing closure.
Qualifications	EDUCATION EXPERIENCE AND SKILLS REQUIRED: • Track record of developing state-of-the-art SOC solutions. Strong skills in Verilog based RTL logic design and verification. • Familiar with ASIC design flow and EDA tools for simulation, synthesis, DFT and equivalence checking. • Hands-on experience with chip bring-up, debug, and lab equipment such as scope, logic analyzer, etc. • Familiar with MATLAB and DSP processor are a plus. • Must be a team player and be self-motivated. • MSEE with 3+ years of design experience. • This is a unique opportunity for someone who has solid system algorithm coding experience to work in HDL and mixed signal design environment.
How to Apply
Email Resume To	USResume@winbond.com
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